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 MM74C906 * MM74C907 Hex Open Drain N-Channel Buffers * Hex Open Drain P-Channel Buffers
October 1987 Revised January 1999
MM74C906 * MM74C907 Hex Open Drain N-Channel Buffers * Hex Open Drain P-Channel Buffers
General Description
The MM74C906 and MM74C907 buffers employ monolithic CMOS technology in achieving open drain outputs. The MM74C906 consists of six inverters driving six N-channel devices; and the MM74C907 consists of six inverters driving six P-channel devices. The open drain feature of these buffers makes level shifting or wire AND and wire OR functions by just the addition of pull-up or pull-down resistors. All inputs are protected from static discharge by diode clamps to VCC and to ground.
Features
s Wide supply voltage range: s Guaranteed noise margin: s High noise immunity: 3V to 15V 1V 0.45 VCC (typ.)
s High current sourcing and sinking open drain outputs
Ordering Code:
Order Number MM74C906M MM74C906N MM74C907N Package Number M14A N14A N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Pin Assignments for DIP and SOIC
Logic Diagrams
MM74C906
MM74C907
Top View
(c) 1999 Fairchild Semiconductor Corporation
DS005911.prf
www.fairchildsemi.com
MM74C906 * MM74C907
Absolute Maximum Ratings(Note 1)
Voltage at Any Input Pin Voltage at Any Output Pin Operating Temperature Range MM74C906/MM74C907 Storage Temperature Range Power Dissipation Dual-In-Line Small Outline 700 mW 500 mW -40C to +85C -65C to +150C -0.3V to VCC +0.3V
Operating VCC Range Absolute Maximum VCC Lead Temperature (TL) (Soldering, 10 seconds)
3V to 15V 18V 260C
Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. Except for "Operating Temperature Range" they are not meant to imply that the devices should be operated at these limits. The table of "Electrical Characteristics" provides conditions for actual device operation.
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted Symbol CMOS TO CMOS VIN(1) VIN(0) IIN(1) IIN(0) ICC Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Input Current Logical "0" Input Current Supply Current Output Leakage MM74C906 MM74C907 CMOS/LPTTL INTERFACE VIN(1) VIN(0) Logical "1" Input Voltage Logical "0" Input Voltage MM74C906 VCC = 4.75V VCC = 4.75V VCC = 4.75V, VIN = 1V +0.1 VCC VCC = 4.75V, VOUT = 0.5V VCC = 4.75V, VOUT = 1.0V MM74C907 VCC = 4.75V, VIN = V CC -1.5V VCC = 4.75V, VOUT = VCC - 0.5V VCC = 4.75V, VOUT = VCC - 1V MM74C906 VCC = 10V, VIN = 2V VCC = 10V, VOUT = 0.5V VCC = 10V, VOUT = 1V MM74C907 VCC = 10V, VIN = 8V VCC = 10V, VOUT = 9.5V VCC = 10V, VOUT = 9V -2.1 -4.2 -4.0 -8.0 mA mA 4.2 8.4 -20 -30 mA mA -1.05 -2.1 -1.5 -3.0 mA mA 2.1 4.2 8.0 12.0 mA mA VCC - 1.5V 0.8 V V VCC = 4.75V, VIN = V CC - 1.5V VCC = 4.75V, VOUT = 18V VCC = 4.75V, VIN = 1V + 0.1 VCC VCC = 4.75V, VOUT = VCC -18V 0.005 5 A 0.005 5 A VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 15V, VIN = 15V VCC = 15V, VIN = 0V VCC = 15V, Output Open -1.0 0.005 -0.005 0.05 15 3.5 8.0 1.5 2 1 V V V V A A A Parameter Conditions Min Typ Max Units
OUTPUT DRIVE CURRENT
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2
MM74C906 * MM74C907
AC Electrical Characteristics
TA = 25C, CL = 50 pF, unless otherwise specified Symbol tpd Parameter Propagation Delay Time to a Logical "0" MM74C906 MM74C907 tpd Propagation Delay Time to a Logical "1" MM74C906 MM74C907 CIN COUT CPD Input Capacitance Output Capacity Power Dissipation Capacity
(Note 2)
Conditions Min Typ Max Units
VCC = 5.0V, R = 10k VCC =10V, R = 10k VCC = 5.0V (Note 3) VCC = 10V (Note 3)
150 75 150 + 0.7 RC 75 + 0.7 RC
ns ns ns ns
VCC = 5.0V (Note 3) VCC = 10V (Note 3) VCC = 5.0V, R = 10k VCC = 10V, R = 10k (Note 4) (Note 4) (Note 5) Per Buffer 5.0 20 30
150 + 0.7 RC 75 + 0.7 RC 150 75
ns ns ns ns pF pF pF
Note 2: AC Parameters are guaranteed by DC correlated testing. Note 3: "C" used in calculating propagation includes output load capacity (CL) plus device output capacity (COUT). Note 4: Capacitance is guaranteed by periodic testing. Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note, AN-90. (Assumes outputs are open).
Typical Applications
Wire OR Gate Wire AND Gate
Note: Can be extended to more than 2 inputs.
Note: Can be extended to more than 2 inputs.
CMOS or TTL to PMOS Interface
CMOS or TTL to CMOS at a Higher VCC
Note: V CC + V DD 18V VCC 15V
3
www.fairchildsemi.com
MM74C906 * MM74C907
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow Package Number M14A
www.fairchildsemi.com
4
MM74C906 * MM74C907 Hex Open Drain N-Channel Buffers * Hex Open Drain P-Channel Buffers
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.


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